The purpose of this article, by Professor Richard Hogg and Dr. Neil Gerrard, is to guide potential customers of III-V Epi Ltd through the Epitaxy specification process; to give best practise advice; and to explain how common specification errors can inadvertently escalate the costs of chips and wafers.

III-V technologies span both electronics and photonics, and are key to enabling the ubiquitous, information age. Although applications are diverse, with every epitaxy user having different device requirements and specifications, the process, and the documentation for specifying the epitaxial structure, are often generic. This article sets out these generic process considerations in the specification of epitaxial wafers, so that the final device meets design requirements, yet can still be practically manufactured, avoiding common design pitfalls that can add unnecessary cost.

Epitaxial wafer structure

The table represents a cross-section of a typical, epitaxial wafer structure in a multi-stage fabrication process. The substrate layer is at the bottom of the table, like in the wafer itself, with each subsequent epitaxy layer deposited on top. This means the top row of the table is the last layer deposited. This format allows for better visualisation of the epilayer structure, with the substrate at the bottom in the pocket of the epitaxial tool. The table is not showing the order of the deposition process, which would be in the reverse.

Specification of the epitaxy layers

The specification of the epitaxy layers in a wafer structure and the purpose of its parametric performance is the customer’s intellectual property (IP). However, III-V Epi Ltd’s fabrication know-how and experience can help with the practical deposition of the required layers and the level of accuracy of their specification, often saving time and money.

Each layer in the table and device is defined in terms of a fractional or percentage alloy composition, thickness (in Å or nm), and doping level. Doping levels are of less than 1 % alloy composition, so are usually specified in terms of atoms, or free carriers, per unit volume (cm-3). Free carriers are more readily measured in the laboratory than the atomic dopant density, so it is usual to specify this rather than the atomic density. The multi-layer stack is critical in achieving the required parametric performance of the final device. However, the cost of depositing epitaxy increases with higher layer tolerances and the assurance of that specification during testing. Therefore, unnecessary levels of accuracy, or over specification, should be avoided to reduce costs.

If a 2nd or 3rd supplier for a production device is sought, a well-defined layer structure and tolerances may have already been developed. However, with a new specification, it is useful to understand what may or may not enhance device reproducibility, or where specifications can be loosened to reduce cost.

Similarly, statistical process control data may identify stratification, suggesting requested specifications need tightening, such as to allow greater reproducibility. However, for new designs under development, this may not yet have been established.

Choice of manufacturing process

There is a choice in the manufacturing process of epitaxy layers in a wafer structure, usually between MBE and MOCVD (see previous article – A comparison between MBE and MOCVD technologies). The choice of epitaxial process may be driven by factors as varied as the materials to be included; operational capacity if the capability is equal; or matching the existing preferred supplier capability with a 2nd or 3rd supplier. For both MBE and MOCVD techniques, a recipe is run that sets the substrate temperature, supply rates (either through cell temperature in MBE, or flow rate in MOCVD), and deposition times for the different III-V species to achieve the composition, thickness, and doping of each layer. Wafer characterisation data is then used to inform the modification of this recipe to achieve the desired specification.

Typical Characterisation Measurements

The specification provided by the customer ultimately determines the level of assurance required. A specification beyond the capabilities of the standard characterisation tools within the laboratory will require additional testing, increasing costs. It may also require additional growth runs specifically to create a sample that enables a requested parameter to be determined and assured. If a growth reactor needs to be “parked” while this time-consuming characterisation process is being caried out, this also has additional cost implications. It is, therefore, important to understand what data can be readily obtained in the epitaxy lab and what incurs additional costs.

Standard characterisation techniques include:

1. Electrochemical capacitance-voltage (eCV), used for the assurance of doping levels, uses an electrolyte-semiconductor Schottky contact to create a depletion region with no free carriers, but containing ionized donors and electrically active defects or traps. This capacitor provides information about the doping and electrically active, defect densities. Depth profiling is achieved by electrolytically etching the semiconductor between the capacitance measurements. This destructive measurement technique is notoriously difficult, relying on an O-ring contact on the surface. This can vary the area and measurement results and is produced using a wet etch process that can be uneven in shape and depth, leaving a crater edge which can also influence results. If required, eCV measurements can be conducted on a production wafer, destroying a few mm^2 of the surface, or on sacrificial witness wafers.
2. X-ray diffraction (XRD), which utilises changes in the direction of X-ray beams due to elastic scattering with the electrons around atoms. This is used to assure most epitaxial wafers, it provides details on the strain of the layers, determining details of relaxation and non-uniformity. Bragg diffraction assures coherent layers (i.e. non-relaxed), providing details of lattice mismatch (strain) of bulk layers, and the average strain repeated stacks of layers, measuring diffracted x-rays from the regular array of atoms within the structure. This includes measuring the crystal and repeats of multi-atomic layers of periodic structures, such as for quantum wells and DBRs.
3. Photoluminescence (PL) spectroscopy measures the band-gap of the emitting layer, which is usually the lowest energy state within the structure, using light emitted after the absorption of photons. The PL intensity can provide insight into the quality of the material – such as etch damage for epitaxially regrown structures, or unintentional defect incorporation. The PL spectrum obtained depends upon the structure being investigated, and the excitation wavelength. It is often necessary to grow special test structures to assure layers of higher, band-gap energy than neighbouring layers.

Usually, the combination of XRD and PL is used to provide a strain and an emission wavelength. These two experimentally determined parameters allow the alloy composition of ternary and quaternary alloys to be determined. However, for quinternary alloys (and those with more elemental species) this measurement is confounded, and the alloy composition cannot be uniquely determined. Therefore, only ternary and quaternary alloys are typically used.

Characterisation techniques that increase costs include:

1. Hall measurements are routinely used for more accurate free carrier concentration measurement, and applications where there is very low doping, such as background doping. Conductivity, carrier concentration, and resistivity for a layer can be determined through the analysis of a voltage created by a current flowing through the layers at right-angles to an applied magnetic field. The most conductive layer dominates the measurement, often requiring a special epitaxial structure in order to be measured.
2. Secondary Ion Mass Spectrometry (SIMS) analyzes the composition of thin films by sputtering the surface of the wafer with a focused, primary ion beam and collecting and analyzing ejected secondary ions. Rather than electrical conductivity, the dopant atom number density can be determined by the mass to charge ratios of these secondary ions, which are measured with a mass spectrometer to determine the elemental, isotopic, or molecular composition of the surface to a depth of 1 to 2 nm. Whilst standard samples for III-V materials can be difficult to obtain, for absolute measurements, comparisons with other materials provide analysis of the dopant species. For many epitaxy suppliers, SIMS is an external service, bringing delays and cost to the manufacturing process.

Pitfalls & Best Practice

Mis-specifying.

Mis-specifying is when layers of epitaxy are requested that cannot be produced, which can be for several reasons. Some dopant levels are simply unachievable, because the physics does not allow them to be produced in epitaxy! For example, InP:Zn doped at ~1×1019 is a common p-contact request because the contact resistance reduces with doping and the design intention is to get the best possible contacts. However, during epitaxy the solubility limit for Zn in InP is ~1-2×1018, meaning the required specification is not simply achieved. When high levels of Zn doping are required, it can be achieved by post-growth diffusion, however, this requires careful development work, adding costs, so should be avoided if it is not necessary.

A second example is when a very thick, strained layer is requested which exceeds the strain-thickness product and will relax. Rather than creating a coherent lattice, vacancies or interstitials may be produced as the deposited material assumes its own lattice constant instead of that of the substrate. Relaxed buffer layers may help in some device structures, such as extended IR detectors, and growth on Si, but they add cost and development complications which should be avoided if a standard epitaxial structure will suffice.

Under-specifying.

Under-specifying is when the tolerance of an epitaxy layer is not constrained enough, impacting the parametric and repeatability performance of the resulting semiconductor device. Under specification often only becomes apparent at the prototype production process stage, when the engineering data indicates the need to tighten tolerances to meet the target performance levels of the device. Access to process and characterisation data for the epitaxy can often ensure III-V Epi engineers spot potential under specification at an early stage, saving prototype costs.

Over-specifying.

Over-specifying is when a tolerance is requested that significantly increases production costs without benefitting device performance. Sometimes this specification can exceed the accuracy levels of the analysis tools used to measure the device, making specifying to this level unnecessary. Significant cycles of growth, characterisation, and recipe modification would be advised instead.

A simple analogy to help explain over-specification is designing an M6 bolt. A specification of M6 ±0.005 mm would require careful analysis, simulation, and testing to verify dimensions. A tolerance of ±0.005 mm would mean the bolt is between 5.995mm and 6.005mm to comply, however, a tolerance of ±0.5 mm might be good enough, making the bolt far cheaper to manufacture and assure.

Common examples of over-specifying epitaxy include:

• Definition of alloy compositions. Device simulators will work to many decimal places, but the characterisation process within the epitaxy lab does not. It is rare that alloy compositions need to be defined to fractions of a percent.
• Specification of doping level tolerance. If this exceeds what can be assured with standard equipment in the laboratory, it will require further characterisation which will add costs.
• Use of ternary layers where a binary would be sufficient. Some device optimisation software appears to produce designs with layers that can be substituted for lower cost alternatives. For example, is an InAs₀.₀₁ P₀.₉₉ layer really needed, or would a standard InP layer be an acceptable substitute? Similarly, avoiding specifying a quaternary if a ternary compound will suffice is good practise.
  • Use of “exotic alloys” that will need extra work to assure. For example, is InGaAsP with an emission energy of 1.172um required, or would a 1.2 um emission be sufficient? Epitaxy suppliers may have established tool settings for more “standard” quaternaries. If a very specific material is required, it can be produced, but assurance of the requested value takes time, effort, and cost.

Conclusion

New electronic and photonic III-V components will often have a unique epitaxial structure at their heart, which is its core IP. However, the epitaxy team at III-V Epi Ltd can contribute to the successful realisation of the component by offering advice on the suitability and possible cost/performance impacts of requested epitaxy designs. The team can also offer an iterative process where simpler structures may be suggested, simulated and tested. Ultimately, this allows a better device to be developed, delivering against the customer’s core IP in the most cost-effective manner. III-V Epi Ltd works with customers to develop new structures and deliver prototype and small volume, manufacturing requirements. This includes the development of epitaxial structure specifications for planned, high volume manufacturing, as well as assistance with wafer characterisation and rapid turn-around testing of epitaxial materials.